AMD, Oracle detail Pensando DPU role in Acceleron SmartNICs

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AMD says Pensando DPUs underpin Oracle Acceleron SmartNICs to offload networking, storage and security for AI and cloud workloads.

AMD said its Pensando data processing units are the programmable foundation for Oracle Acceleron SmartNICs, framing the partnership as a way to shift networking, storage and security tasks closer to the data path as AI workloads add new demands to cloud infrastructure. The company’s Oct. 27, 2026 blog post said the architecture is intended to preserve host CPU capacity for customer applications while supporting both AI and established enterprise workloads.

Evidence and context

In the AMD post published Oct. 27, 2026, the company said training, inference and agentic AI are creating traffic patterns that can be harder to balance than conventional cloud traffic because flows can be long-lived, bursty and synchronized. AMD argued that these patterns increase the need for high throughput, predictable latency, strong isolation, efficient security and adaptability as multi-tenant AI infrastructure scales.

AMD said its Pensando DPUs help power Oracle Acceleron SmartNICs for Oracle’s AMD compute and accelerator instances. According to the post, the SmartNIC architecture combines host networking and cloud-control functions in one design while maintaining isolation between customer and cloud-managed functions. AMD said that can reduce hardware complexity and unnecessary data movement, which it described as important when infrastructure overhead affects available resources for training and inference.

The company also said the same offload model supports database, cloud-native and enterprise applications by accelerating networking, storage and security functions in hardware. AMD said Oracle Acceleron SmartNIC architecture powered by Pensando DPUs can deliver up to a 2x improvement in network processing efficiency and increased storage performance, depending on workload and configuration. AMD did not provide a benchmark methodology in the blog post.

On security, AMD said the architecture supports Oracle Cloud Infrastructure Zero Trust Packet Routing, or ZPR, by applying access policies near the host edge where traffic enters and leaves. The post said that approach helps flag and contain unauthorized packets early and enables near-zero-downtime security patching. AMD described these features as part of a security-first design intended to preserve boundaries between customers and services.

The blog post also emphasized programmability. AMD said Pensando DPU technology gives OCI a foundation for evolving networking, storage, security and observability services as AI models, training methods, inference patterns and agentic applications change. The post did not specify a deployment timeline or product shipment details beyond the stated role of the DPUs in Oracle Acceleron SmartNICs.

Background material supplied with the source notes that AMD’s current Pensando portfolio includes Salina, Giglio and Elba. The background also says Salina was announced on Oct. 10, 2024, and is aimed at AI front-end networking, while Pollara 400 was positioned separately as a back-end AI NIC. AMD’s product brief for Salina lists a PCIe 5.0 x16 interface, support for up to two hosts, two QSFP112 ports, configurations including 2 x 400GbE or 4 x 200GbE, 64GB ECC DDR5 at 6400 MT/s, and support for P4, C and C++ development. AMD’s Elba brief lists dual-200Gb/s line-rate services, 144 P4 match-processing units and 16 Arm Cortex-A72 cores, along with encryption and storage-offload engines.

AMD also reports Salina SDN throughput of 117 million packets per second and 782Gb/s in tests dated April 15, 2025, according to the supplied background. Those figures are vendor measurements and are workload-specific, not guaranteed application performance.